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Ordering number : ENA1525
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Bi-CMOS IC
LV8064TT
Overview
Fan Motor Driver
Single-Phase Full-Wave Driver
The LV8064TT is a single-phase bipolar fan motor driver IC. It features quiet operation that suppresses reactive current through BTL output system. The speed control range can be adjusted to desired values by the external application program, so that it can rotate fan at lower speeds than conventional drivers in the same driver voltage control range. It is optimal for use in applications that require low noise and power saving, including CPU coolers.
Functions
* Single-phase full-wave drive with BTL output (BTL amplifier gain = 43dB) * Speed control gain adjusted by SET pin * Constant-voltage output pin for Hall bias (VREG = 1.05V typ) * FG output pin (open collector output) * Lock protection and auto return circuits built-in * Built-in thermal protection circuit
Specifications
Absolute Maximum Ratings at Ta = 25C
Parameter Supply voltage Output current Symbol VCC max IOUT max1 IOUT max2 Output withstand voltage FG output withstand FG output current REG output current Allowable dissipation VOUT max VFG max IFG max IREG max Pd max1 Pd max2 Junction temperature Operating temperature Storage temperature Tj max Topr Tstg Independent IC With specified substrate * During steady state During lock protection Conditions Ratings 7 0.7 1 7 7 5 10 0.2 0.4 +150 -30 to +95 -55 to +150 Unit V A A V V mA mA W W C C C
* Specified substrate : 20mm x 10mm x 0.8mm, Paper phenol
Any and all SANYO Semiconductor Co.,Ltd. products described or contained herein are, with regard to "standard application", intended for the use as general electronics equipment (home appliances, AV equipment, communication device, office equipment, industrial equipment etc.). The products mentioned herein shall not be intended for use for any "special application" (medical equipment whose purpose is to sustain life, aerospace instrument, nuclear control device, burning appliances, transportation machine, traffic signal system, safety equipment etc.) that shall require extremely high level of reliability and can directly threaten human lives in case of failure or malfunction of the product or may cause harm to human bodies, nor shall they grant any guarantee thereof. If you should intend to use our products for applications outside the standard applications of our customer who is considering such use and/or outside the scope of our intended standard applications, please consult with us prior to the intended use. If there is no consultation or inquiry before the intended use, our customer shall be solely responsible for the use. Specifications of any and all SANYO Semiconductor Co.,Ltd. products described or contained herein stipulate the performance, characteristics, and functions of the described products in the independent state, and are not guarantees of the performance, characteristics, and functions of the described products as mounted in the customer's products or equipment. To verify symptoms and states that cannot be evaluated in an independent device, the customer should always evaluate and test devices mounted in the customer's products or equipment.
80509 SY PC 20090701-S00001 No.A1525-1/8
LV8064TT
Recommended Operating Conditions at Ta = 25C
Parameter Supply voltage Common-phase input voltage range of Hall input SET pin input voltage range VSETIN Symbol VCC VICM Conditions Ratings
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Unit 2.2 to 6.0 V V V
0.3 to VCC-1.5 0.3 to VREG
Electrical Characteristics at Ta = 25C, VCC = 5V, unless especially speified.
Parameter Circuit current REG pin output voltage Hall input bias current Output On voltage Hall amplifier input offset voltage Hall amplifier voltage gain CPWM pin charge current CPWM pin discharge current CPWM pin charge/discharge current ratio CPWM pin high voltage CPWM pin oscillation amplitude SET pin input bias current FG output pin low voltag FG output pin leakage current FG comparator hysteresis width Output on time during lock protection Output off time during lock protection Lock protection on/off ratio Thermal shutdown operating temperature Thermal shutdown hysteresis width Symbol ICC VREG IHIN VO VINOFS GH ICPC ICPD ICPRTO VCPH VCPA ISET VFG IFGL VFG TACT TDET TRTO TSD TSD VSET = 0.5V, CPWM = 100pF VSET = 0.5V, CPWM = 100pF TRTO = TDET/TACT Design guarantee * Design guarantee * IFG = 3mA VFG = 5V 5 0.3 3.0 8 15 0.5 5 10 180 40 VSET = 0.5V 0.4 VSET = 0.5V VSET = 0.5V ICPRTO = ICPC/ICPD 0.7 IO = 250mA, source + sink -10 40 43 4.5 4.5 1 1.3 0.5 8 8 1.2 1.5 0.6 1 0.3 10 20 0.65 6.5 11 C C V V A V A mV sec sec 0.44 When IREG = 5mA 0.9 Conditions min Ratings typ 3 1.05 max 5 1.2 1 0.54 10 mA V A V mV dB A A Unit
* Design guaranteed value (No measurement is performed.)
Package Dimensions
unit : mm (typ) 3375
0.5
Pd max -- Ta
Specified board (20 x 10 x 0.8mm3, paper phenol)
3.0
Ambient temperature, Ta -- C
12
0.4
0.3
3.0
4.9
0.5
0.2
Independent IC
0.18
12 (0.25) 0.5 0.2
1.1 MAX (0.85)
0.125
0.1
0.09
0 --30 --20
0
20
40
60
80
100
120
Ambient temperature, Ta -- C
SANYO : MSOP12(150mil)
0.08
No.A1525-2/8
LV8064TT
Pin Assignment
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IN1 REG IN2 SGND PGND OUT1
1 2 3 4 5 6
12 11 10 9 8 7
CPWM SET FG SVCC PVCC OUT2
Top view
Block Diagram
TSD IN1 1 ENABLE REG 2 REGULATOR
LOCK DETECTION 12 CPWM OSC & DUTY CONTROL 11 SET
IN2
3
LEVEL SHIFT CONTROL
10 FG
SGND
4
9
SVCC
PGND
5
8
PVCC
+
OUT1
6
+ -
7
OUT2
No.A1525-3/8
LV8064TT
Pin Description
Pin No. 1 Pin name IN1 Pin voltage Description Hall input pin (+) Equivalent circuit
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1
3 IN2 Hall input pin (-)
3
2
REG
1.05V (typ)
Hall bias output pin
2
4 5 6
SGND PGND OUT1 0V
Signal GND Power GND
7
OUT2
-
Motor drive output pin
6 7
8 9 10
SVCC PVCC FG 2.2V to 6.0V -
Signal power source Power source FG pulse output pin
10
11
SET
0.3V to VREG
PWM voltage control pin
11
12
CPWM
-
PWM oscillator capacitor connection pin
12
No.A1525-4/8
LV8064TT
Timing Chart When motor is steady-state rotation
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VCC VTH (Internal) CPWM
HYS
HYS
PWM (Internal)
Missing PWM pulses (No missing PWM pulse) HYS (No missing PWM pulse)
Missing PWM pulses
IN1-IN2
HYS
OUT1 Min. duty width OUT2 Min. duty interval
FG
* VTH = 0.5V+VCC/6 (typ) * Check for the presence or absence of PWM pulses at intervals of 1/2 FG period, and if there are missing pulses, immediately turn off the PWM pulse output. If there are no missing pulses at 1/2 FG period intervals, restart generating PWM pulses at the next interval. *Truth Table When Steady Rotation
IN1 H IN2 L L H L H L L L L L H L OFF *PWM H OUT1 H OUT2 L L During rotation - regeneration During rotation - drive During rotation - regeneration FG Mode During rotation - drive
* IC's internal signal
No.A1525-5/8
LV8064TT
When motor is locked
Motor locked
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Motor rerotated
IN1-IN2
OUT1
OUT2
FG
FG detected TACT ( = 0.5S (typ)) Wait for FG pulses TACT ( = 5S (typ)) Motor lock protection Restart
* When motor protection is activated, both OUT1 and OUT2 output low level.
No.A1525-6/8
LV8064TT
Application Circuit Example
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*3 *2 R1 H 2 REG 3 IN2 4 SGND 5 PGND 6 OUT1 SET 11 FG 10 SVCC 9 PVCC 8 OUT2 7 1 IN1 CPWM 12
*5 *4
*6 R2
R3
*1
M
*1 Capacitors with capacitances adequate to tabilize the power-supply voltage must be inserted between the PVCC pin and PGND pin and between the SVCC pin and SGND pin as close as possible to each pin. An excessive increase of the power supply voltage due to the regeneration current of the motor can cause a fatal damage to the IC. Be sure to use a zener diode if such a condition is likely to occur. *2 The REG pin outputs a constant voltage of 1.05V (typ). Stable Hall output of excellent temperature characteristics is obtained by providing a bias to the Hall element from the REG pin. Insert R1 when adjusting the Hall amplitude. When this pin is not to be used, pull it down to GND with a resistor of 1k to 10k. *3 Insert a capacitor of an adequate capacitance between the REG pin and GND pin to stabilize the Hall signal and SET pin input voltage. When the wiring from the Hall output to the Hall input is long, noise may be carried through the wiring. Insert a capacitor close to the IN1 and IN2 pins as shown in the figure. *4 A capacitor for PWM oscillation. A 120pF capacitor provides an oscillation frequency of approx. 33kHz (typ). *5 Must be held open when this pin is not to be used. *6 The SET pin is used to determine the amplitude of the triangle waves generated at the CPWM pin. The same voltage level input to this pin determines the amplitude of the triangle wave. To make the amplitude of the triangle waves constant regardless of possible power voltage fluctuations, apply to the SET pin the register-divided voltage from the REG pin as shown in the figure.
No.A1525-7/8
LV8064TT
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This catalog provides information as of August, 2009. Specifications and information herein are subject to change without notice. PS No.A1525-8/8

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